<HTML><HEAD><TITLE>Device Usage Statistics Report</TITLE></HEAD>
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'><H3>Device Usage Page (usage_statistics_webtalk.html)</H3>This HTML page displays the device usage statistics that will be sent to Xilinx.<BR>To see the actual file transmitted to Xilinx, please click <A HREF="./usage_statistics_webtalk.xml">here</A>.<BR><BR><HR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='4'><B>software_version_and_target_device</B></TD></TR>
<TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>beta</B></TD><TD>FALSE</TD>
  <TD BGCOLOR='#DBE5F1'><B>build_version</B></TD><TD>2086221</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>date_generated</B></TD><TD>Sat May 25 21:04:22 2019</TD>
  <TD BGCOLOR='#DBE5F1'><B>os_platform</B></TD><TD>WIN64</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>product_version</B></TD><TD>Vivado v2017.4 (64-bit)</TD>
  <TD BGCOLOR='#DBE5F1'><B>project_id</B></TD><TD>09b4b82bc4444a18bb10c08ead8179aa</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>project_iteration</B></TD><TD>25</TD>
  <TD BGCOLOR='#DBE5F1'><B>random_id</B></TD><TD>220f3d51f19e53babe643a3eede1dfc2</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>registration_id</B></TD><TD>220f3d51f19e53babe643a3eede1dfc2</TD>
  <TD BGCOLOR='#DBE5F1'><B>route_design</B></TD><TD>TRUE</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>target_device</B></TD><TD>xc7a100t</TD>
  <TD BGCOLOR='#DBE5F1'><B>target_family</B></TD><TD>artix7</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>target_package</B></TD><TD>csg324</TD>
  <TD BGCOLOR='#DBE5F1'><B>target_speed</B></TD><TD>-1</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>tool_flow</B></TD><TD>Vivado</TD>
</TR> </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='4'><B>user_environment</B></TD></TR>
<TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>cpu_name</B></TD><TD>Intel(R) Core(TM) i5-8250U CPU @ 1.60GHz</TD>
  <TD BGCOLOR='#DBE5F1'><B>cpu_speed</B></TD><TD>1800 MHz</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>os_name</B></TD><TD>Microsoft Windows 8 or later , 64-bit</TD>
  <TD BGCOLOR='#DBE5F1'><B>os_release</B></TD><TD>major release  (build 9200)</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>system_ram</B></TD><TD>8.000 GB</TD>
  <TD BGCOLOR='#DBE5F1'><B>total_processors</B></TD><TD>1</TD>
</TR> </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='4'><B>vivado_usage</B></TD></TR>
<TR ALIGN='LEFT'>  <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
   <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>gui_handlers</B></TD></TR>
<TR ALIGN='LEFT'>   <TD>abstractfileview_close=1</TD>
   <TD>addsrcwizard_specify_hdl_netlist_block_design=2</TD>
   <TD>addsrcwizard_specify_or_create_constraint_files=1</TD>
   <TD>addsrcwizard_specify_simulation_specific_hdl_files=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>basedialog_cancel=21</TD>
   <TD>basedialog_ok=97</TD>
   <TD>basedialog_yes=28</TD>
   <TD>cmdmsgdialog_ok=15</TD>
</TR><TR ALIGN='LEFT'>   <TD>constraintschooserpanel_add_files=1</TD>
   <TD>constraintschooserpanel_create_file=1</TD>
   <TD>coretreetablepanel_core_tree_table=12</TD>
   <TD>createconstraintsfilepanel_file_name=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>createsrcfiledialog_file_name=1</TD>
   <TD>exportschematicdialog_specify_file=3</TD>
   <TD>filesetpanel_file_set_panel_tree=509</TD>
   <TD>flownavigatortreepanel_flow_navigator_tree=96</TD>
</TR><TR ALIGN='LEFT'>   <TD>graphicalview_zoom_fit=1</TD>
   <TD>hardwaretreepanel_hardware_tree_table=15</TD>
   <TD>hcodeeditor_close=1</TD>
   <TD>hcodeeditor_search_text_combo_box=4</TD>
</TR><TR ALIGN='LEFT'>   <TD>hinputhandler_replace_text=3</TD>
   <TD>mainmenumgr_export=3</TD>
   <TD>mainmenumgr_file=10</TD>
   <TD>mainmenumgr_import=3</TD>
</TR><TR ALIGN='LEFT'>   <TD>mainmenumgr_open_recent_file=3</TD>
   <TD>mainmenumgr_open_recent_project=4</TD>
   <TD>mainmenumgr_view=2</TD>
   <TD>mainwinmenumgr_layout=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>msgtreepanel_message_view_tree=12</TD>
   <TD>msgview_critical_warnings=1</TD>
   <TD>msgview_error_messages=5</TD>
   <TD>msgview_warning_messages=5</TD>
</TR><TR ALIGN='LEFT'>   <TD>netlistschmenuandmouse_expand_collapse=1</TD>
   <TD>netlistschmenuandmouse_view=8</TD>
   <TD>pacommandnames_add_config_memory=1</TD>
   <TD>pacommandnames_add_sources=8</TD>
</TR><TR ALIGN='LEFT'>   <TD>pacommandnames_auto_connect_target=12</TD>
   <TD>pacommandnames_auto_update_hier=3</TD>
   <TD>pacommandnames_export_bitstream_files=2</TD>
   <TD>pacommandnames_export_schematic=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>pacommandnames_goto_implemented_design=1</TD>
   <TD>pacommandnames_import_all_srcs=1</TD>
   <TD>pacommandnames_open_hardware_manager=4</TD>
   <TD>pacommandnames_open_target_wizard=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>pacommandnames_program_config_memory=4</TD>
   <TD>pacommandnames_recustomize_core=9</TD>
   <TD>pacommandnames_run_bitgen=2</TD>
   <TD>pacommandnames_simulation_run_behavioral=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>pacommandnames_toggle_view_nav=5</TD>
   <TD>pacommandnames_unhighlight_selection=1</TD>
   <TD>pacommandnames_write_config_memory_file=3</TD>
   <TD>pacommandnames_zoom_area=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>pacommandnames_zoom_fit=1</TD>
   <TD>pacommandnames_zoom_out=2</TD>
   <TD>paviews_code=35</TD>
   <TD>paviews_device=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>paviews_ip_catalog=2</TD>
   <TD>paviews_schematic=6</TD>
   <TD>planaheadtab_show_flow_navigator=5</TD>
   <TD>primitivesmenu_highlight_leaf_cells=2</TD>
</TR><TR ALIGN='LEFT'>   <TD>programcfgmemdialog_contents_of_configuration_file=3</TD>
   <TD>programdebugtab_open_target=9</TD>
   <TD>programdebugtab_program_device=48</TD>
   <TD>programdebugtab_refresh_device=4</TD>
</TR><TR ALIGN='LEFT'>   <TD>programfpgadialog_program=48</TD>
   <TD>programfpgadialog_specify_bitstream_file=19</TD>
   <TD>progressdialog_background=8</TD>
   <TD>progressdialog_cancel=2</TD>
</TR><TR ALIGN='LEFT'>   <TD>projecttab_reload=3</TD>
   <TD>rdicommands_delete=13</TD>
   <TD>rdicommands_hide_world_view=1</TD>
   <TD>rdicommands_properties=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>rdicommands_show_world_view=1</TD>
   <TD>rdiviews_waveform_viewer=1</TD>
   <TD>removesourcesdialog_also_delete=1</TD>
   <TD>saveprojectutils_save=3</TD>
</TR><TR ALIGN='LEFT'>   <TD>saveschematicdialog_orientation=1</TD>
   <TD>saveschematicdialog_specify_output_pdf_file=1</TD>
   <TD>schmenuandmouse_cycle_selection=1</TD>
   <TD>schmenuandmouse_expand_cone=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>schmenuandmouse_remove_selected_items_from_schematic=1</TD>
   <TD>schmenuandmouse_save_as_pdf_file=2</TD>
   <TD>selectmenu_highlight=7</TD>
   <TD>selectmenu_mark=4</TD>
</TR><TR ALIGN='LEFT'>   <TD>settingsdialog_project_tree=2</TD>
   <TD>simpleoutputproductdialog_generate_output_products_immediately=8</TD>
   <TD>srcchooserpanel_add_hdl_and_netlist_files_to_your_project=10</TD>
   <TD>srcchooserpanel_create_file=2</TD>
</TR><TR ALIGN='LEFT'>   <TD>srcmenu_ip_hierarchy=2</TD>
   <TD>srcmenu_refresh_hierarchy=1</TD>
   <TD>stalerundialog_yes=2</TD>
   <TD>statemonitor_reset_run=3</TD>
</TR><TR ALIGN='LEFT'>   <TD>syntheticagettingstartedview_recent_projects=2</TD>
   <TD>syntheticastatemonitor_cancel=4</TD>
   <TD>taskbanner_close=7</TD>
   <TD>xpg_ipsymbol_show_disabled_ports=2</TD>
</TR>  </TABLE>
  <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
   <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>java_command_handlers</B></TD></TR>
<TR ALIGN='LEFT'>   <TD>addcfgmem=1</TD>
   <TD>addsources=8</TD>
   <TD>autoconnecttarget=12</TD>
   <TD>coreview=3</TD>
</TR><TR ALIGN='LEFT'>   <TD>customizecore=4</TD>
   <TD>editcopy=12</TD>
   <TD>editdelete=13</TD>
   <TD>editpaste=4</TD>
</TR><TR ALIGN='LEFT'>   <TD>editproperties=1</TD>
   <TD>editundo=47</TD>
   <TD>exportbitfile=2</TD>
   <TD>hideworldview=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>launchopentarget=1</TD>
   <TD>launchprogramfpga=48</TD>
   <TD>openhardwaremanager=17</TD>
   <TD>openrecenttarget=8</TD>
</TR><TR ALIGN='LEFT'>   <TD>programcfgmem=5</TD>
   <TD>programdevice=2</TD>
   <TD>recustomizecore=19</TD>
   <TD>refreshdevice=4</TD>
</TR><TR ALIGN='LEFT'>   <TD>runbitgen=31</TD>
   <TD>runimplementation=5</TD>
   <TD>runschematic=6</TD>
   <TD>runsynthesis=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>savefileproxyhandler=7</TD>
   <TD>showview=2</TD>
   <TD>showworldview=1</TD>
   <TD>simulationrun=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>toggleviewnavigator=5</TD>
   <TD>togglezoomareamode=1</TD>
   <TD>toolssettings=4</TD>
   <TD>ui.views.c.ap=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>unhighlightselection=1</TD>
   <TD>viewtaskimplementation=3</TD>
   <TD>viewtaskrtlanalysis=2</TD>
   <TD>writecfgmemfile=2</TD>
</TR><TR ALIGN='LEFT'>   <TD>zoomfit=1</TD>
   <TD>zoomout=2</TD>
</TR>  </TABLE>
</TR><TR ALIGN='LEFT'>  <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
   <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>other_data</B></TD></TR>
<TR ALIGN='LEFT'>   <TD>guimode=4</TD>
</TR>  </TABLE>
  <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
   <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>project_data</B></TD></TR>
<TR ALIGN='LEFT'>   <TD>constraintsetcount=1</TD>
   <TD>core_container=false</TD>
   <TD>currentimplrun=impl_1</TD>
   <TD>currentsynthesisrun=synth_1</TD>
</TR><TR ALIGN='LEFT'>   <TD>default_library=xil_defaultlib</TD>
   <TD>designmode=RTL</TD>
   <TD>export_simulation_activehdl=6</TD>
   <TD>export_simulation_ies=6</TD>
</TR><TR ALIGN='LEFT'>   <TD>export_simulation_modelsim=6</TD>
   <TD>export_simulation_questa=6</TD>
   <TD>export_simulation_riviera=6</TD>
   <TD>export_simulation_vcs=6</TD>
</TR><TR ALIGN='LEFT'>   <TD>export_simulation_xsim=6</TD>
   <TD>implstrategy=Vivado Implementation Defaults</TD>
   <TD>launch_simulation_activehdl=0</TD>
   <TD>launch_simulation_ies=0</TD>
</TR><TR ALIGN='LEFT'>   <TD>launch_simulation_modelsim=0</TD>
   <TD>launch_simulation_questa=0</TD>
   <TD>launch_simulation_riviera=0</TD>
   <TD>launch_simulation_vcs=0</TD>
</TR><TR ALIGN='LEFT'>   <TD>launch_simulation_xsim=1</TD>
   <TD>simulator_language=Mixed</TD>
   <TD>srcsetcount=6</TD>
   <TD>synthesisstrategy=Vivado Synthesis Defaults</TD>
</TR><TR ALIGN='LEFT'>   <TD>target_language=VHDL</TD>
   <TD>target_simulator=XSim</TD>
   <TD>totalimplruns=3</TD>
   <TD>totalsynthesisruns=3</TD>
</TR>  </TABLE>
</TR> </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>unisim_transformation</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>post_unisim_transformation</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>bufg=6</TD>
    <TD>carry4=14</TD>
    <TD>fdce=35</TD>
    <TD>fdpe=8</TD>
</TR><TR ALIGN='LEFT'>    <TD>fdre=172</TD>
    <TD>gnd=57</TD>
    <TD>ibuf=13</TD>
    <TD>lut1=8</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut2=14</TD>
    <TD>lut3=27</TD>
    <TD>lut4=25</TD>
    <TD>lut5=83</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut6=315</TD>
    <TD>mmcme2_adv=1</TD>
    <TD>muxf7=98</TD>
    <TD>muxf8=20</TD>
</TR><TR ALIGN='LEFT'>    <TD>obuf=19</TD>
    <TD>obuft=1</TD>
    <TD>ramb18e1=4</TD>
    <TD>ramb36e1=50</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcc=55</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>pre_unisim_transformation</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>bufg=6</TD>
    <TD>carry4=14</TD>
    <TD>fdce=35</TD>
    <TD>fdpe=8</TD>
</TR><TR ALIGN='LEFT'>    <TD>fdre=172</TD>
    <TD>gnd=57</TD>
    <TD>ibuf=13</TD>
    <TD>lut1=8</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut2=14</TD>
    <TD>lut3=27</TD>
    <TD>lut4=25</TD>
    <TD>lut5=83</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut6=315</TD>
    <TD>mmcme2_adv=1</TD>
    <TD>muxf7=98</TD>
    <TD>muxf8=20</TD>
</TR><TR ALIGN='LEFT'>    <TD>obuf=19</TD>
    <TD>obuft=1</TD>
    <TD>ramb18e1=4</TD>
    <TD>ramb36e1=50</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcc=55</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>power_opt_design</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>command_line_options_spo</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>-cell_types=default::all</TD>
    <TD>-clocks=default::[not_specified]</TD>
    <TD>-exclude_cells=default::[not_specified]</TD>
    <TD>-include_cells=default::[not_specified]</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>usage</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>bram_ports_augmented=72</TD>
    <TD>bram_ports_newly_gated=54</TD>
    <TD>bram_ports_total=108</TD>
    <TD>flow_state=default</TD>
</TR><TR ALIGN='LEFT'>    <TD>slice_registers_augmented=0</TD>
    <TD>slice_registers_newly_gated=0</TD>
    <TD>slice_registers_total=217</TD>
    <TD>srls_augmented=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>srls_newly_gated=0</TD>
    <TD>srls_total=0</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>ip_statistics</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>blk_mem_gen_v8_4_1/1</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>c_addra_width=18</TD>
    <TD>c_addrb_width=18</TD>
    <TD>c_algorithm=1</TD>
    <TD>c_axi_id_width=4</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_axi_slave_type=0</TD>
    <TD>c_axi_type=1</TD>
    <TD>c_byte_size=9</TD>
    <TD>c_common_clk=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_count_18k_bram=4</TD>
    <TD>c_count_36k_bram=50</TD>
    <TD>c_ctrl_ecc_algo=NONE</TD>
    <TD>c_default_data=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_disable_warn_bhv_coll=0</TD>
    <TD>c_disable_warn_bhv_range=0</TD>
    <TD>c_elaboration_dir=./</TD>
    <TD>c_en_deepsleep_pin=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_en_ecc_pipe=0</TD>
    <TD>c_en_rdaddra_chg=0</TD>
    <TD>c_en_rdaddrb_chg=0</TD>
    <TD>c_en_safety_ckt=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_en_shutdown_pin=0</TD>
    <TD>c_en_sleep_pin=0</TD>
    <TD>c_enable_32bit_address=0</TD>
    <TD>c_est_power_summary=Estimated Power for IP     _     16.423531 mW</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_family=artix7</TD>
    <TD>c_has_axi_id=0</TD>
    <TD>c_has_ena=0</TD>
    <TD>c_has_enb=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_has_injecterr=0</TD>
    <TD>c_has_mem_output_regs_a=0</TD>
    <TD>c_has_mem_output_regs_b=1</TD>
    <TD>c_has_mux_output_regs_a=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_has_mux_output_regs_b=0</TD>
    <TD>c_has_regcea=0</TD>
    <TD>c_has_regceb=0</TD>
    <TD>c_has_rsta=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_has_rstb=0</TD>
    <TD>c_has_softecc_input_regs_a=0</TD>
    <TD>c_has_softecc_output_regs_b=0</TD>
    <TD>c_init_file=blk_mem_gen_0.mem</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_init_file_name=no_coe_file_loaded</TD>
    <TD>c_inita_val=0</TD>
    <TD>c_initb_val=0</TD>
    <TD>c_interface_type=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_load_init_file=0</TD>
    <TD>c_mem_type=1</TD>
    <TD>c_mux_pipeline_stages=0</TD>
    <TD>c_prim_type=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_read_depth_a=153600</TD>
    <TD>c_read_depth_b=153600</TD>
    <TD>c_read_width_a=12</TD>
    <TD>c_read_width_b=12</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_rst_priority_a=CE</TD>
    <TD>c_rst_priority_b=CE</TD>
    <TD>c_rstram_a=0</TD>
    <TD>c_rstram_b=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_sim_collision_check=ALL</TD>
    <TD>c_use_bram_block=0</TD>
    <TD>c_use_byte_wea=0</TD>
    <TD>c_use_byte_web=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_use_default_data=0</TD>
    <TD>c_use_ecc=0</TD>
    <TD>c_use_softecc=0</TD>
    <TD>c_use_uram=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_wea_width=1</TD>
    <TD>c_web_width=1</TD>
    <TD>c_write_depth_a=153600</TD>
    <TD>c_write_depth_b=153600</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_write_mode_a=NO_CHANGE</TD>
    <TD>c_write_mode_b=WRITE_FIRST</TD>
    <TD>c_write_width_a=12</TD>
    <TD>c_write_width_b=12</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_xdevicefamily=artix7</TD>
    <TD>core_container=false</TD>
    <TD>iptotal=1</TD>
    <TD>x_ipcorerevision=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>x_iplanguage=VHDL</TD>
    <TD>x_iplibrary=ip</TD>
    <TD>x_ipname=blk_mem_gen</TD>
    <TD>x_ipproduct=Vivado 2017.4</TD>
</TR><TR ALIGN='LEFT'>    <TD>x_ipsimlanguage=MIXED</TD>
    <TD>x_ipvendor=xilinx.com</TD>
    <TD>x_ipversion=8.4</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>clk_wiz_v5_4_3_0/1</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>clkin1_period=10.000</TD>
    <TD>clkin2_period=10.000</TD>
    <TD>clock_mgr_type=NA</TD>
    <TD>component_name=clk_wiz_0</TD>
</TR><TR ALIGN='LEFT'>    <TD>core_container=NA</TD>
    <TD>enable_axi=0</TD>
    <TD>feedback_source=FDBK_AUTO</TD>
    <TD>feedback_type=SINGLE</TD>
</TR><TR ALIGN='LEFT'>    <TD>iptotal=1</TD>
    <TD>manual_override=false</TD>
    <TD>num_out_clk=3</TD>
    <TD>primitive=MMCM</TD>
</TR><TR ALIGN='LEFT'>    <TD>use_dyn_phase_shift=false</TD>
    <TD>use_dyn_reconfig=false</TD>
    <TD>use_inclk_stopped=false</TD>
    <TD>use_inclk_switchover=false</TD>
</TR><TR ALIGN='LEFT'>    <TD>use_locked=true</TD>
    <TD>use_max_i_jitter=false</TD>
    <TD>use_min_o_jitter=false</TD>
    <TD>use_phase_alignment=true</TD>
</TR><TR ALIGN='LEFT'>    <TD>use_power_down=false</TD>
    <TD>use_reset=true</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>report_drc</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>command_line_options</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>-append=default::[not_specified]</TD>
    <TD>-checks=default::[not_specified]</TD>
    <TD>-fail_on=default::[not_specified]</TD>
    <TD>-force=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-format=default::[not_specified]</TD>
    <TD>-messages=default::[not_specified]</TD>
    <TD>-name=default::[not_specified]</TD>
    <TD>-return_string=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-ruledecks=default::[not_specified]</TD>
    <TD>-upgrade_cw=default::[not_specified]</TD>
    <TD>-waived=default::[not_specified]</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>results</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>cfgbvs-1=1</TD>
    <TD>plck-12=1</TD>
    <TD>rpbf-3=1</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>report_methodology</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>command_line_options</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>-append=default::[not_specified]</TD>
    <TD>-checks=default::[not_specified]</TD>
    <TD>-fail_on=default::[not_specified]</TD>
    <TD>-force=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-format=default::[not_specified]</TD>
    <TD>-messages=default::[not_specified]</TD>
    <TD>-name=default::[not_specified]</TD>
    <TD>-return_string=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-waived=default::[not_specified]</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>results</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>timing-16=771</TD>
    <TD>timing-17=171</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>report_power</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>command_line_options</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>-advisory=default::[not_specified]</TD>
    <TD>-append=default::[not_specified]</TD>
    <TD>-file=[specified]</TD>
    <TD>-format=default::text</TD>
</TR><TR ALIGN='LEFT'>    <TD>-hier=default::power</TD>
    <TD>-l=default::[not_specified]</TD>
    <TD>-name=default::[not_specified]</TD>
    <TD>-no_propagation=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-return_string=default::[not_specified]</TD>
    <TD>-rpx=[specified]</TD>
    <TD>-verbose=default::[not_specified]</TD>
    <TD>-vid=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-xpe=default::[not_specified]</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>usage</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>airflow=250 (LFM)</TD>
    <TD>ambient_temp=25.0 (C)</TD>
    <TD>bi-dir_toggle=12.500000</TD>
    <TD>bidir_output_enable=1.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>board_layers=12to15 (12 to 15 Layers)</TD>
    <TD>board_selection=medium (10&quot;x10&quot;)</TD>
    <TD>bram=0.002457</TD>
    <TD>clocks=0.001586</TD>
</TR><TR ALIGN='LEFT'>    <TD>confidence_level_clock_activity=Low</TD>
    <TD>confidence_level_design_state=High</TD>
    <TD>confidence_level_device_models=High</TD>
    <TD>confidence_level_internal_activity=Medium</TD>
</TR><TR ALIGN='LEFT'>    <TD>confidence_level_io_activity=Low</TD>
    <TD>confidence_level_overall=Low</TD>
    <TD>customer=TBD</TD>
    <TD>customer_class=TBD</TD>
</TR><TR ALIGN='LEFT'>    <TD>devstatic=0.099968</TD>
    <TD>die=xc7a100tcsg324-1</TD>
    <TD>dsp_output_toggle=12.500000</TD>
    <TD>dynamic=0.136022</TD>
</TR><TR ALIGN='LEFT'>    <TD>effective_thetaja=4.6</TD>
    <TD>enable_probability=0.990000</TD>
    <TD>family=artix7</TD>
    <TD>ff_toggle=12.500000</TD>
</TR><TR ALIGN='LEFT'>    <TD>flow_state=routed</TD>
    <TD>heatsink=medium (Medium Profile)</TD>
    <TD>i/o=0.004432</TD>
    <TD>input_toggle=12.500000</TD>
</TR><TR ALIGN='LEFT'>    <TD>junction_temp=26.1 (C)</TD>
    <TD>logic=0.000233</TD>
    <TD>mgtavcc_dynamic_current=0.000000</TD>
    <TD>mgtavcc_static_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>mgtavcc_total_current=0.000000</TD>
    <TD>mgtavcc_voltage=1.000000</TD>
    <TD>mgtavtt_dynamic_current=0.000000</TD>
    <TD>mgtavtt_static_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>mgtavtt_total_current=0.000000</TD>
    <TD>mgtavtt_voltage=1.200000</TD>
    <TD>mmcm=0.125592</TD>
    <TD>netlist_net_matched=NA</TD>
</TR><TR ALIGN='LEFT'>    <TD>off-chip_power=0.000000</TD>
    <TD>on-chip_power=0.235991</TD>
    <TD>output_enable=1.000000</TD>
    <TD>output_load=5.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>output_toggle=12.500000</TD>
    <TD>package=csg324</TD>
    <TD>pct_clock_constrained=3.000000</TD>
    <TD>pct_inputs_defined=7</TD>
</TR><TR ALIGN='LEFT'>    <TD>platform=nt64</TD>
    <TD>process=typical</TD>
    <TD>ram_enable=50.000000</TD>
    <TD>ram_write=50.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>read_saif=False</TD>
    <TD>set/reset_probability=0.000000</TD>
    <TD>signal_rate=False</TD>
    <TD>signals=0.001723</TD>
</TR><TR ALIGN='LEFT'>    <TD>simulation_file=None</TD>
    <TD>speedgrade=-1</TD>
    <TD>static_prob=False</TD>
    <TD>temp_grade=commercial</TD>
</TR><TR ALIGN='LEFT'>    <TD>thetajb=5.7 (C/W)</TD>
    <TD>thetasa=4.6 (C/W)</TD>
    <TD>toggle_rate=False</TD>
    <TD>user_board_temp=25.0 (C)</TD>
</TR><TR ALIGN='LEFT'>    <TD>user_effective_thetaja=4.6</TD>
    <TD>user_junc_temp=26.1 (C)</TD>
    <TD>user_thetajb=5.7 (C/W)</TD>
    <TD>user_thetasa=4.6 (C/W)</TD>
</TR><TR ALIGN='LEFT'>    <TD>vccadc_dynamic_current=0.000000</TD>
    <TD>vccadc_static_current=0.020000</TD>
    <TD>vccadc_total_current=0.020000</TD>
    <TD>vccadc_voltage=1.800000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vccaux_dynamic_current=0.069759</TD>
    <TD>vccaux_io_dynamic_current=0.000000</TD>
    <TD>vccaux_io_static_current=0.000000</TD>
    <TD>vccaux_io_total_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vccaux_io_voltage=1.800000</TD>
    <TD>vccaux_static_current=0.018169</TD>
    <TD>vccaux_total_current=0.087928</TD>
    <TD>vccaux_voltage=1.800000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vccbram_dynamic_current=0.000217</TD>
    <TD>vccbram_static_current=0.001486</TD>
    <TD>vccbram_total_current=0.001703</TD>
    <TD>vccbram_voltage=1.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vccint_dynamic_current=0.006198</TD>
    <TD>vccint_static_current=0.016578</TD>
    <TD>vccint_total_current=0.022776</TD>
    <TD>vccint_voltage=1.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco12_dynamic_current=0.000000</TD>
    <TD>vcco12_static_current=0.000000</TD>
    <TD>vcco12_total_current=0.000000</TD>
    <TD>vcco12_voltage=1.200000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco135_dynamic_current=0.000000</TD>
    <TD>vcco135_static_current=0.000000</TD>
    <TD>vcco135_total_current=0.000000</TD>
    <TD>vcco135_voltage=1.350000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco15_dynamic_current=0.000000</TD>
    <TD>vcco15_static_current=0.000000</TD>
    <TD>vcco15_total_current=0.000000</TD>
    <TD>vcco15_voltage=1.500000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco18_dynamic_current=0.000000</TD>
    <TD>vcco18_static_current=0.000000</TD>
    <TD>vcco18_total_current=0.000000</TD>
    <TD>vcco18_voltage=1.800000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco25_dynamic_current=0.000000</TD>
    <TD>vcco25_static_current=0.000000</TD>
    <TD>vcco25_total_current=0.000000</TD>
    <TD>vcco25_voltage=2.500000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco33_dynamic_current=0.001225</TD>
    <TD>vcco33_static_current=0.004000</TD>
    <TD>vcco33_total_current=0.005225</TD>
    <TD>vcco33_voltage=3.300000</TD>
</TR><TR ALIGN='LEFT'>    <TD>version=2017.4</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>report_utilization</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>clocking</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>bufgctrl_available=32</TD>
    <TD>bufgctrl_fixed=0</TD>
    <TD>bufgctrl_used=5</TD>
    <TD>bufgctrl_util_percentage=15.63</TD>
</TR><TR ALIGN='LEFT'>    <TD>bufhce_available=96</TD>
    <TD>bufhce_fixed=0</TD>
    <TD>bufhce_used=0</TD>
    <TD>bufhce_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>bufio_available=24</TD>
    <TD>bufio_fixed=0</TD>
    <TD>bufio_used=0</TD>
    <TD>bufio_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>bufmrce_available=12</TD>
    <TD>bufmrce_fixed=0</TD>
    <TD>bufmrce_used=0</TD>
    <TD>bufmrce_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>bufr_available=24</TD>
    <TD>bufr_fixed=0</TD>
    <TD>bufr_used=0</TD>
    <TD>bufr_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>mmcme2_adv_available=6</TD>
    <TD>mmcme2_adv_fixed=0</TD>
    <TD>mmcme2_adv_used=1</TD>
    <TD>mmcme2_adv_util_percentage=16.67</TD>
</TR><TR ALIGN='LEFT'>    <TD>plle2_adv_available=6</TD>
    <TD>plle2_adv_fixed=0</TD>
    <TD>plle2_adv_used=0</TD>
    <TD>plle2_adv_util_percentage=0.00</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>dsp</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>dsps_available=240</TD>
    <TD>dsps_fixed=0</TD>
    <TD>dsps_used=0</TD>
    <TD>dsps_util_percentage=0.00</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>io_standard</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>blvds_25=0</TD>
    <TD>diff_hstl_i=0</TD>
    <TD>diff_hstl_i_18=0</TD>
    <TD>diff_hstl_ii=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>diff_hstl_ii_18=0</TD>
    <TD>diff_hsul_12=0</TD>
    <TD>diff_mobile_ddr=0</TD>
    <TD>diff_sstl135=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>diff_sstl135_r=0</TD>
    <TD>diff_sstl15=0</TD>
    <TD>diff_sstl15_r=0</TD>
    <TD>diff_sstl18_i=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>diff_sstl18_ii=0</TD>
    <TD>hstl_i=0</TD>
    <TD>hstl_i_18=0</TD>
    <TD>hstl_ii=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>hstl_ii_18=0</TD>
    <TD>hsul_12=0</TD>
    <TD>lvcmos12=0</TD>
    <TD>lvcmos15=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>lvcmos18=0</TD>
    <TD>lvcmos25=0</TD>
    <TD>lvcmos33=1</TD>
    <TD>lvds_25=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>lvttl=0</TD>
    <TD>mini_lvds_25=0</TD>
    <TD>mobile_ddr=0</TD>
    <TD>pci33_3=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>ppds_25=0</TD>
    <TD>rsds_25=0</TD>
    <TD>sstl135=0</TD>
    <TD>sstl135_r=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>sstl15=0</TD>
    <TD>sstl15_r=0</TD>
    <TD>sstl18_i=0</TD>
    <TD>sstl18_ii=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>tmds_33=0</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>memory</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>block_ram_tile_available=135</TD>
    <TD>block_ram_tile_fixed=0</TD>
    <TD>block_ram_tile_used=52</TD>
    <TD>block_ram_tile_util_percentage=38.52</TD>
</TR><TR ALIGN='LEFT'>    <TD>ramb18_available=270</TD>
    <TD>ramb18_fixed=0</TD>
    <TD>ramb18_used=4</TD>
    <TD>ramb18_util_percentage=1.48</TD>
</TR><TR ALIGN='LEFT'>    <TD>ramb18e1_only_used=4</TD>
    <TD>ramb36_fifo_available=135</TD>
    <TD>ramb36_fifo_fixed=0</TD>
    <TD>ramb36_fifo_used=50</TD>
</TR><TR ALIGN='LEFT'>    <TD>ramb36_fifo_util_percentage=37.04</TD>
    <TD>ramb36e1_only_used=50</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>primitives</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>bufg_functional_category=Clock</TD>
    <TD>bufg_used=5</TD>
    <TD>carry4_functional_category=CarryLogic</TD>
    <TD>carry4_used=14</TD>
</TR><TR ALIGN='LEFT'>    <TD>fdce_functional_category=Flop &amp; Latch</TD>
    <TD>fdce_used=37</TD>
    <TD>fdpe_functional_category=Flop &amp; Latch</TD>
    <TD>fdpe_used=8</TD>
</TR><TR ALIGN='LEFT'>    <TD>fdre_functional_category=Flop &amp; Latch</TD>
    <TD>fdre_used=174</TD>
    <TD>ibuf_functional_category=IO</TD>
    <TD>ibuf_used=13</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut1_functional_category=LUT</TD>
    <TD>lut1_used=8</TD>
    <TD>lut2_functional_category=LUT</TD>
    <TD>lut2_used=26</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut3_functional_category=LUT</TD>
    <TD>lut3_used=28</TD>
    <TD>lut4_functional_category=LUT</TD>
    <TD>lut4_used=84</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut5_functional_category=LUT</TD>
    <TD>lut5_used=83</TD>
    <TD>lut6_functional_category=LUT</TD>
    <TD>lut6_used=315</TD>
</TR><TR ALIGN='LEFT'>    <TD>mmcme2_adv_functional_category=Clock</TD>
    <TD>mmcme2_adv_used=1</TD>
    <TD>muxf7_functional_category=MuxFx</TD>
    <TD>muxf7_used=98</TD>
</TR><TR ALIGN='LEFT'>    <TD>muxf8_functional_category=MuxFx</TD>
    <TD>muxf8_used=20</TD>
    <TD>obuf_functional_category=IO</TD>
    <TD>obuf_used=19</TD>
</TR><TR ALIGN='LEFT'>    <TD>obuft_functional_category=IO</TD>
    <TD>obuft_used=1</TD>
    <TD>ramb18e1_functional_category=Block Memory</TD>
    <TD>ramb18e1_used=4</TD>
</TR><TR ALIGN='LEFT'>    <TD>ramb36e1_functional_category=Block Memory</TD>
    <TD>ramb36e1_used=50</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>slice_logic</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>f7_muxes_available=31700</TD>
    <TD>f7_muxes_fixed=0</TD>
    <TD>f7_muxes_used=98</TD>
    <TD>f7_muxes_util_percentage=0.31</TD>
</TR><TR ALIGN='LEFT'>    <TD>f8_muxes_available=15850</TD>
    <TD>f8_muxes_fixed=0</TD>
    <TD>f8_muxes_used=20</TD>
    <TD>f8_muxes_util_percentage=0.13</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut_as_logic_available=63400</TD>
    <TD>lut_as_logic_fixed=0</TD>
    <TD>lut_as_logic_used=512</TD>
    <TD>lut_as_logic_util_percentage=0.81</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut_as_memory_available=19000</TD>
    <TD>lut_as_memory_fixed=0</TD>
    <TD>lut_as_memory_used=0</TD>
    <TD>lut_as_memory_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>register_as_flip_flop_available=126800</TD>
    <TD>register_as_flip_flop_fixed=0</TD>
    <TD>register_as_flip_flop_used=219</TD>
    <TD>register_as_flip_flop_util_percentage=0.17</TD>
</TR><TR ALIGN='LEFT'>    <TD>register_as_latch_available=126800</TD>
    <TD>register_as_latch_fixed=0</TD>
    <TD>register_as_latch_used=0</TD>
    <TD>register_as_latch_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>slice_luts_available=63400</TD>
    <TD>slice_luts_fixed=0</TD>
    <TD>slice_luts_used=512</TD>
    <TD>slice_luts_util_percentage=0.81</TD>
</TR><TR ALIGN='LEFT'>    <TD>slice_registers_available=126800</TD>
    <TD>slice_registers_fixed=0</TD>
    <TD>slice_registers_used=219</TD>
    <TD>slice_registers_util_percentage=0.17</TD>
</TR><TR ALIGN='LEFT'>    <TD>fully_used_lut_ff_pairs_fixed=0.17</TD>
    <TD>fully_used_lut_ff_pairs_used=10</TD>
    <TD>lut_as_distributed_ram_fixed=0</TD>
    <TD>lut_as_distributed_ram_used=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut_as_logic_available=63400</TD>
    <TD>lut_as_logic_fixed=0</TD>
    <TD>lut_as_logic_used=512</TD>
    <TD>lut_as_logic_util_percentage=0.81</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut_as_memory_available=19000</TD>
    <TD>lut_as_memory_fixed=0</TD>
    <TD>lut_as_memory_used=0</TD>
    <TD>lut_as_memory_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut_as_shift_register_fixed=0</TD>
    <TD>lut_as_shift_register_used=0</TD>
    <TD>lut_ff_pairs_with_one_unused_flip_flop_fixed=0</TD>
    <TD>lut_ff_pairs_with_one_unused_flip_flop_used=64</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut_ff_pairs_with_one_unused_lut_output_fixed=64</TD>
    <TD>lut_ff_pairs_with_one_unused_lut_output_used=62</TD>
    <TD>lut_flip_flop_pairs_available=63400</TD>
    <TD>lut_flip_flop_pairs_fixed=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut_flip_flop_pairs_used=77</TD>
    <TD>lut_flip_flop_pairs_util_percentage=0.12</TD>
    <TD>slice_available=15850</TD>
    <TD>slice_fixed=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>slice_used=251</TD>
    <TD>slice_util_percentage=1.58</TD>
    <TD>slicel_fixed=0</TD>
    <TD>slicel_used=184</TD>
</TR><TR ALIGN='LEFT'>    <TD>slicem_fixed=0</TD>
    <TD>slicem_used=67</TD>
    <TD>unique_control_sets_used=16</TD>
    <TD>using_o5_and_o6_fixed=16</TD>
</TR><TR ALIGN='LEFT'>    <TD>using_o5_and_o6_used=32</TD>
    <TD>using_o5_output_only_fixed=32</TD>
    <TD>using_o5_output_only_used=0</TD>
    <TD>using_o6_output_only_fixed=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>using_o6_output_only_used=480</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>specific_feature</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>bscane2_available=4</TD>
    <TD>bscane2_fixed=0</TD>
    <TD>bscane2_used=0</TD>
    <TD>bscane2_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>capturee2_available=1</TD>
    <TD>capturee2_fixed=0</TD>
    <TD>capturee2_used=0</TD>
    <TD>capturee2_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>dna_port_available=1</TD>
    <TD>dna_port_fixed=0</TD>
    <TD>dna_port_used=0</TD>
    <TD>dna_port_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>efuse_usr_available=1</TD>
    <TD>efuse_usr_fixed=0</TD>
    <TD>efuse_usr_used=0</TD>
    <TD>efuse_usr_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>frame_ecce2_available=1</TD>
    <TD>frame_ecce2_fixed=0</TD>
    <TD>frame_ecce2_used=0</TD>
    <TD>frame_ecce2_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>icape2_available=2</TD>
    <TD>icape2_fixed=0</TD>
    <TD>icape2_used=0</TD>
    <TD>icape2_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>pcie_2_1_available=1</TD>
    <TD>pcie_2_1_fixed=0</TD>
    <TD>pcie_2_1_used=0</TD>
    <TD>pcie_2_1_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>startupe2_available=1</TD>
    <TD>startupe2_fixed=0</TD>
    <TD>startupe2_used=0</TD>
    <TD>startupe2_util_percentage=0.00</TD>
</TR><TR ALIGN='LEFT'>    <TD>xadc_available=1</TD>
    <TD>xadc_fixed=0</TD>
    <TD>xadc_used=0</TD>
    <TD>xadc_util_percentage=0.00</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>router</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>usage</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>actual_expansions=109316368</TD>
    <TD>bogomips=0</TD>
    <TD>bram18=4</TD>
    <TD>bram36=50</TD>
</TR><TR ALIGN='LEFT'>    <TD>bufg=0</TD>
    <TD>bufr=0</TD>
    <TD>congestion_level=0</TD>
    <TD>ctrls=16</TD>
</TR><TR ALIGN='LEFT'>    <TD>dsp=0</TD>
    <TD>effort=2</TD>
    <TD>estimated_expansions=2871300</TD>
    <TD>ff=219</TD>
</TR><TR ALIGN='LEFT'>    <TD>global_clocks=5</TD>
    <TD>high_fanout_nets=0</TD>
    <TD>iob=33</TD>
    <TD>lut=534</TD>
</TR><TR ALIGN='LEFT'>    <TD>movable_instances=1148</TD>
    <TD>nets=1525</TD>
    <TD>pins=17068</TD>
    <TD>pll=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>router_runtime=5.000000</TD>
    <TD>router_timing_driven=1</TD>
    <TD>threads=2</TD>
    <TD>timing_constraints_exist=1</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>synthesis</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>command_line_options</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>-assert=default::[not_specified]</TD>
    <TD>-bufg=default::12</TD>
    <TD>-cascade_dsp=default::auto</TD>
    <TD>-constrset=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-control_set_opt_threshold=default::auto</TD>
    <TD>-directive=default::default</TD>
    <TD>-fanout_limit=default::10000</TD>
    <TD>-flatten_hierarchy=default::rebuilt</TD>
</TR><TR ALIGN='LEFT'>    <TD>-fsm_extraction=default::auto</TD>
    <TD>-gated_clock_conversion=default::off</TD>
    <TD>-generic=default::[not_specified]</TD>
    <TD>-include_dirs=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-keep_equivalent_registers=default::[not_specified]</TD>
    <TD>-max_bram=default::-1</TD>
    <TD>-max_bram_cascade_height=default::-1</TD>
    <TD>-max_dsp=default::-1</TD>
</TR><TR ALIGN='LEFT'>    <TD>-max_uram=default::-1</TD>
    <TD>-max_uram_cascade_height=default::-1</TD>
    <TD>-mode=default::default</TD>
    <TD>-name=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-no_lc=default::[not_specified]</TD>
    <TD>-no_srlextract=default::[not_specified]</TD>
    <TD>-no_timing_driven=default::[not_specified]</TD>
    <TD>-part=xc7a100tcsg324-1</TD>
</TR><TR ALIGN='LEFT'>    <TD>-resource_sharing=default::auto</TD>
    <TD>-retiming=default::[not_specified]</TD>
    <TD>-rtl=default::[not_specified]</TD>
    <TD>-rtl_skip_constraints=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-rtl_skip_ip=default::[not_specified]</TD>
    <TD>-seu_protect=default::none</TD>
    <TD>-sfcu=default::[not_specified]</TD>
    <TD>-shreg_min_size=default::3</TD>
</TR><TR ALIGN='LEFT'>    <TD>-top=top</TD>
    <TD>-verilog_define=default::[not_specified]</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>usage</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>elapsed=00:01:04s</TD>
    <TD>hls_ip=0</TD>
    <TD>memory_gain=541.500MB</TD>
    <TD>memory_peak=786.406MB</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>xsim</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>command_line_options</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>-sim_mode=default::behavioral</TD>
    <TD>-sim_type=default::</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
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